ULP-RISCV configuration register
| COCPU_CLK_FO | ULP-RISCV clock force on |
| COCPU_START_2_RESET_DIS | Time from ULP-RISCV startup to pull down reset |
| COCPU_START_2_INTR_EN | Time from ULP-RISCV startup to send out RISCV_START_INT interrupt |
| COCPU_SHUT | Shut down ULP-RISCV |
| COCPU_SHUT_2_CLK_DIS | Time from shut down ULP-RISCV to disable clock |
| COCPU_SHUT_RESET_EN | This bit is used to reset ULP-RISCV |
| COCPU_SEL | 0: select ULP-RISCV. 1: select ULP-FSM |
| COCPU_DONE_FORCE | 0: select ULP-FSM DONE signal. 1: select ULP-RISCV DONE signal |
| COCPU_DONE | DONE signal. Write 1 to this bit, ULP-RISCV will go to HALT and the timer starts counting |
| COCPU_SW_INT_TRIGGER | Trigger ULP-RISCV register interrupt |